Ethernet Switch ASIC Design Engineer

Company:

Qualcomm China

Job Area:
Engineering Group, Engineering Group > ASICS Engineering

General Summary:

Requirements:

Familiar with ASIC development, especially logic design, RTL coding, verification, synthesis, timing closure and physical design flow

Familiarity with Ethernet switching concepts, such as:

L2/L3 forwarding, bridging, routing

Packet processing pipelines

Basic QoS (queuing, scheduling)

Knowledge of AXI/NoC, PCIe or high-speed interfaces is a plus

Scripting skills (C/C++, Tcl, Perl) preferred

Excellent teamwork, interpersonal and communication skills.

Fluent in Chinese and English both verbal and written.

Ability to work in stressful situations with tight schedules to meet.

Description of Function & Responsibility

Implement RTL design, synthesis, and timing closure for networking datapath/control logic

Participating in SoC integration with focus on Ethernet switch subsystems

Debug functional and performance issues across design, DV, and validation teams

Collaborate with architecture, firmware, and validation teams to support chip bring-up

Minimum Qualifications:
• Bachelor's degree in Science, Engineering, or related field.

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