锦鲤求职岗位描述
岗位职责：
1.Develop design specification for block implementation
2.Write RTL code in Verilog or System Verilog
3.Write timing constraints, power intent, perform synthesis, lint check, block and chip level timing analysis, low power flow
4.Assist and interface with physical design team
任职要求：
1.Years of industry experience in deep submicron ASIC design
2.Expertise with HDL and design of high speed, high complexity, large scale digital logic required
3.Skilled with scripting languages, such as perl, python, shell, makefile, tcl, etc
4.Experienced with low power design is a plus Expertise of computer architecture and computer arithmetic is a plus