DFT工程师

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岗位描述

Job Description:

- Block/IP and SoC top level DFT implementation (MBIST, Scan, Boundary Scan, analog/IP and RF test etc.), IP/SoC DFT RTL coding and integration;

- Participate in SoC CP/FT test Spec/plan definition, complete DFT Spec documents and review checklists;

- SoC DFT mode SDC definition and STA support; ECO and FV check;

- Test patterns/caes generation and verification, RTL/pre&post layout gate level simulation;

- silicon back ATE bring-up, MP yield improvment, failure analysis and diagnosis.

先核对岗位要求与自己的经历，再准备档案、投递和面试。